| PART |
Description |
Maker |
| T74LS113AD1 T74LS113AC1 T74LS113AM1 T74LS113AB1 |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 CERAMIC, DIP-14
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC20 PLASTIC, LCC-20
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 MICRO, SO-14
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14 PLASTIC, DIP-14
|
ST Microelectronics
|
| SN74LS112D |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
Motorola, Inc
|
| SN74LS114D SN54LS114J SN74LS114N SN54LS114A SN5474 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
MOTOROLA[Motorola, Inc]
MOTOROLA[Motorola Inc]
|
| SN54LS113A SN74LS113A |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP JK负边沿触发器
|
Motorola Mobility Holdings, Inc.
MOTOROLA[Motorola, Inc]
|
| SN54_74LS113A ON2810 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
From old datasheet system
|
ON Semi
|
| IDT74LVC112A 74LVC112A_DS_87847 |
3.3V CMOS DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
From old datasheet system
|
IDT
|
| 74LCX112 74LCX112M 74LCX112MTC 74LCX112SJ 74LCX112 |
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs
|
FAIRCHILD[Fairchild Semiconductor]
|
| 74HC73 74HC73PW 74HC73D |
Dual JK flip-flop with reset; negative-edge trigger
Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors
|
| 74LVX112SJ 74LVX112 74LVX112M 74LVX112MTC 74LVX112 |
LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
Low Voltage Dual J-K Flip-Flops with Preset and Clear
|
FAIRCHILD SEMICONDUCTOR CORP
FAIRCHILD[Fairchild Semiconductor]
|
